As the value and use of information continues to increase, individuals and businesses seek additional ways to process and store information. One option available to users is information handling systems. An information handling system generally processes, compiles, stores, and/or communicates information or data for business, personal, or other purposes thereby allowing users to take advantage of the value of the information. Because technology and information handling needs and requirements vary between different users or applications, information handling systems may also vary regarding what information is handled, how the information is handled, how much information is processed, stored, or communicated, and how quickly and efficiently the information may be processed, stored, or communicated. The variations in information handling systems allow for information handling systems to be general or configured for a specific user or specific use such as financial transaction processing, airline reservations, enterprise data storage, or global communications. In addition, information handling systems may include a variety of hardware and software components that may be configured to process, store, and communicate information and may include one or more computer systems, data storage systems, and networking systems.
Information handling systems often use one or more processors and one or more memory resources to process and store information. Physical and logical relationships among processors and their associated memory resources may be established according to any number of architectures. For example, processors and memory resources may be logically organized pursuant to a non-uniform memory access (NUMA) architecture. Under NUMA, each processor in an information handling system may be provided its own separate, dedicated memory. NUMA may be advantageous for a number of reasons. First, a processor can often access memory physically proximate to or “local” to the processor faster than non-local memory (e.g., memory local to another processor or memory shared between processors). Second, by providing a dedicated memory for each processor, a NUMA-aware operating system may optimize overall memory bandwidth and allocated local memory to a processor to the extent possible. Thus, for at least these two reasons, NUMA may provide performance advantages over memory architectures which do not employ NUMA.
Another example of a memory architecture is known as “node interleaving.” Under node interleaving, contiguous system memory addresses may be alternated among memory resources in a system. For example, in a two-processor system, a first range of memory addresses may be assigned to memory local to the first processor, the next range may be assigned to memory local to the second processor, the subsequent range may be assigned to memory local to the first processor, and so on. Node interleaving is best suited for a NUMA-unaware operating system where a memory range has no affinity to a particular processor. An additional advantage of node-interleaved memory is that because it inherently balances memory access throughout a system, it may reduce localized heating that may occur if a processor were to access only memory local to it. Historically, in order to alternate memory addresses among memory resources, node interleaving required physically symmetrical memory architectures wherein each processor's local memory was identically sized (e.g., if a first processor in a two-processor system had each of a 1 GB and 2 GB memory module local to it, second processor would also require each of a 1 GB and 2 GB memory module local to it).
For various reasons including thermal, system layout, and other design reasons, information handling systems have increasingly utilized physical layouts not allowing physically symmetrical memory architectures (e.g., the number of dual inline memory module slots for each processor may differ).
In traditional information handling systems, NUMA is often automatically disabled when node interleaving is enabled, which may lead to disadvantages in information handling systems with unsymmetrical physical memory architectures. One particular disadvantage is loss of use of memory-to-processor affinity in a node-interleaved information handling system with physically unsymmetrical memory. For example, consider a two-processor information handling system wherein 2 GB of memory is local to the first processor and 3 GB of memory is local to the second processor. If node interleaving is enabled in such a system, the 2 GB of memory associated with the first processor, and the lowest 2 GB of the 3 GB of memory associated with the second processor may be interleaved to create a 4 GB node-interleaved memory. However, the upper 1 GB of the 3 GB memory local to the second processor is not part of the node-interleaved memory, and because NUMA is disabled, neither processor has any affinity to this 1 GB portion of memory.